1. Technical Field
Aspects of this document relate to semiconductor packages and leadframes for semiconductor packages.
2. Background Art
Conventional semiconductor packages connect one or more semiconductor die to a motherboard or other associated circuitry and provide thermal and environmental protection for the die and other elements. Examples of conventional semiconductor packages include packages that include a leadframe to which the semiconductor die is/are coupled before being overmolded with a mold compound. Leads of the leadframe extend beyond the mold material, or may be exposed at and flush with an outer surface of the mold material in some leadless designs, and are used as electrical connections to the die inside the package.
Some conventional semiconductor packages include one die that includes a switching element such as a metal-oxide-semiconductor field-effect transistor (MOSFET) or insulated gate bipolar transistor (IGBT) (transistor chip) and another die that includes a control element (control chip) in the same package. Conventional methods of including both a transistor chip and control chip in the same package while electrically isolating a lower surface of the control chip from a lower surface of the transistor chip include: forming electrically isolated islands and mounting each chip on a separate island, as described in U.S. Patent Application Publication No. 2011/03309408 titled “Semiconductor Device and Method of Producing Same,” listing as first inventor Masakazu Watanabe, filed Aug. 25, 2011, published Dec. 22, 2011 (hereinafter the '408 Publication”) (in the '408 Publication the leadframe includes no tie bars between the islands); placing both chips on the same island using insulated film (such as an insulating adhesive tape or an insulated liquid adhesive) at the lower surface of the control chip, as described in U.S. Pat. No. 6,756,689 titled “Power Device Having Multi-Chip Package Structure,” listing as first inventor Shi-baek Nam, issued Jun. 29, 2004 (hereinafter “the '689 Patent”), and; mounting the control chip on top of the transistor chip using an insulated film (such as an insulated liquid adhesive) as also described in the '689 Patent; the disclosures of the '408 Publication and the '689 Patent are hereby incorporated entirely herein by reference.